[問題] 移除 Verilog comments.
請問有沒有人能寫個 sed 或是 awk 小程式
我需要移除 Verilog 裡面的注解.
1. " // " 之後的文字都要移除，但同一行若前面有字則必須留下.
ex:
reg [7:0] mem; // this is memory
變成 reg [7:0] mem;
2. /* this is a comment */ 將這種注解移除，同一行內若有其他字則不可移除.
如:
a. reg [7:0] addr; /* this is address */
變成 reg [7:0] addr;
b. .addr(ADDR), /* xyzabc */ .data(DATA), .we(WE) );
變成 .addr(ADDR), .data(DATA), .we(WE) );
感謝大家的指導.
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